Talk:Checkout

Wonderful. And perhaps an excellent argument for the position that even languages with clear use cases, ones that are even intended to be used for practical purposes, can be esoteric. —ehird 17:11, 22 February 2011 (UTC)

A cat in Checkout?

I made this program that (I think) should be a cat program.

while/6 1 {
 interleave/6 {
  in/5 [0]/5
  out/5 [0]/5 } }

--Iconmaster 22:23, 23 February 2011 (UTC)

Checkout binary format

I have some idea for binary format. The file consists of a list of sixteen-bit words. For a command word, bits are as follows:

• bit15-bit14: First parameter mode
• bit13-bit12: Second parameter mode
• bit11-bit10: Third parameter mode
• bit9-bit7: Command level (zero and seven are special; see below)
• bit6-bit0: Command code

Parameter modes are:

• 0 = Omitted or automatic parameter
• 1 = Constant
• 2 = Address (high two bits of address specify level where (0,1,2,3) means level (1,3,5,6))
• 3 = Indirect (high two bits are level of memory being accessed by command, next two bits are level of memory being used to select indirection)

Parameters follow the command code and have the system bit width (specified in the header; see below)

Command level zero is currently meaningless.

Command level seven currently includes the following:

• sixteen/7: Parameters are sixteen bits long.
• thirtytwo/7: Parameters are thirty-two bits long.
• sixtyfour/7: Parameters are sixty-four bits long.
• onehundredtwentyeight/7: Parameters are one hundred twenty-eight bits long.
• empty/7: Specifies an empty command list parameter.
• begin/7: Begin command list parameters.
• next/7: End the current list and begin the next command list parameter.
• end/7: End command list parameters.
• eof/7: End of file.

Tell me if you have any other ideas, too. --Zzo38 20:57, 25 February 2011 (UTC)

Reference implementation?

The article draws several parallels between Checkout and the GPU architecture, and claims this can result in significant speed gains compared to naive C. Has there been any work towards a compiler targeting CUDA or OpenCL, whence such claims could be tested?

Hardware implementation

I would like to see an implmentation in a hardware description language. Perhaps first implement a compiler into binary for this hardware, and then implement the hardware which can run this binary. If an open-source hardware implementation is made then maybe we can also learn why there are such restrictions and precisely how checkout operations and so on are working. --Zzo38 (talk) 04:25, 5 November 2012 (UTC)

Impossible to checkout to level 6?

The malloc/6 command puts the initial address of the created memory in a provided level 5 memory location. However, the only commands which can initialize the memory thus created, checkout/5, only allow indirect addressing from level 6 memory, not from level 5 memory. Since no level 6 memory exists at the beginning of program execution, and level 6 memory does not necessarily begin from address 0, there is no safe address to move the malloc/6 return value to so that you can use it to indirectly address the block of memory you have allocated. As a result, level 6 memory can never be used under the current specification. 24.19.237.231 23:48, 28 October 2014 (UTC)

Right. On an actual computer, there's the profile-dependent possibility for level 5 memory to be aware of level 6 addresses (and thus able to checkout from level 6 with its own addresses). I should probably add that in. --ais523 13:45, 5 November 2014 (UTC)