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FANJIX computer is a new kind of processor instruction codes, for esoteric programming. It was designed by User:Zzo38 in 2010.

Each byte is 40 bits long. An address is 40 bits long. Each register is 40 bits long. An instruction is 80 bits long, which must be aligned.

Reg. no. Meaning
rA Address register
rC Copy register
rD Data register (read/write memory at address rA)
rI Instruction register (address of current instruction)
rP All bits of rX turned backwards
rQ (!(rX&rY))<<1
rS Shift register
rX X operand register
rY Y operand register
r+ (rX&rY)<<1
r| (rX|rY)
r& ~(rX&rY)
r? (rX&~rY)<<1

Instruction bits (left half)
Bit no. Meaning
0 Read r0
1 Read r1
2 Read r2
3 Read r3
4 Read r4
5 Read r5
6 Read r6
7 Read r7
8 Read r8
9 Read r9
10 Write r0
11 Write r1
12 Write r2
13 Write r3
14 Write r4
15 Write r5
16 Write r6
17 Write r7
18 Write r8
19 Write r9
20 Read rD
21 Write rD
22 Read r?
23 Copy rI to rC
24 Write rX
25 Write rY
26 Read r+
27 Read r|
28 Read rX
29 Read r&
30 Read rY
31 Read rS
32 Write rS
33 Read rA
34 Write rA
35 Next instruction address XORed by rC
36 Next instruction address XORed by rQ
37 Next instruction address XORed by rD
38 Read rC
39 Read rP
Instruction bits (right half)
Bit no. Meaning
39…1 Next instruction address
0 This bit shifted into rS register

Order of operations:

  1. Read registers according to instruction bits, XOR together the results
  2. Bit0 of right half shifted into rS (rS=(rS<<1)|(1&*(rI|1));)
  3. Write XORed result to all registers according to instruction bits
  4. Next instruction is selected, by setting rI (rC and rQ is reading at first step, if necessary)
  5. Repeat!