Magic-1

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Magic-1 is a unique home-built microcomputer with a custom CPU. It was designed and developped mainly by Bill Buzbee. The hardware was built between 2005 and 2006, the software mostly between 2005 and 2009.

The Magic-1 CPU has a custom small CISC instruction set. The CPU is built from TTL logic chips and wires and has a microcoded architecture. This is completed to a complete computer, with RAM and a disk and other peripherials.

There are two hardware instances of Magic-1: the original built by Bill Buzbee and an exact replica built by Aidil Jazmi in 2006.

The machine has a front panel with various blinking lights showing the internal states of the CPU, and control switches including single-step which let you debug the CPU live.

The 8-bit CPU supports interrupts, multitasking, memory protection to protect the operating system from userspace programs, and paging. Using paging, processes see a separate 64 kilobyte sized data address space and a 64 kilobyte sized code address space, with 2 kilobyte sized pages mapped into the 4 megabytes of physical RAM or swapped on demand from the disk. (The paging has caused one of the most difficult to debug bugs in a previous version of the CPU, where if the function call instruction had a page fault when loading the address argument of the instruction, it failed to restore the stack pointer that it has modified. Bill has since fixed the microcode to fix this bug.)

The instruction set has variable length instructions, with one byte of opcode followed by up to three bytes of arguments. Simple arithmetic (add, sub, and, or, cmp) is done on the 16-bit A register used as one input and output oprand, but various addressing modes for the second operand including immediate, register, and indexed memory access. Immediates can be 0, 1 or 2 bytes long. Memory operand is either 16-bit offset relative to the DP register, or 8-bit offset relative to the B or SP registers. There are also load and store instructions for the A and B registers with a similar selection of addressing mode. Arithmetic and load/store instructions exist in 8 and 16 bit widths. A few arithmetic instructions (adc, sbc, xor, shifts) however, only have one addressing mode each, to conserve opcode space. The C, DP and SP registers can be loaded from A or popped or pushed to the stack. There are arithmetic condition flags and conditional jump instructions for both signed and unsigned compares. There are also some instructions combining a compare or test with a short jump, with the compare part using the same selection of addressing modes as ordinary arithmetic: these instructions alone take up 53 of the 256 opcodes.

Subroutine linkage is done through the stack with the SP register. The addressing modes let you use the top 256 bytes of the stack conveniently as if they were extra registers. There are also instructions for pushing and popping to registers; call and return instructions that store the return address on the stack; and an enter/leave instruction pair, where the enter instruction allocates a stack frame with the size given in the argument and pushes the old stack pointer, and the leave instruction pops the stack pointer.

Software for Magic-1 is cross-compiled from a bigger PC with a custom C compiler. Magic-1 currently runs a port of Minix, which is heavily modified to support swapping pages from the disk. There are many application programs ported, including the Colossal Cave Adventure, a BASIC interpreter. The machine is also running a telnet server and a webserver connected to the internet publically: the telnet server lets anyone try the machine. Before the minix port, Magic-1 used to run a simpler custom operating system.

Links

All info about the computer: http://www.homebrewcpu.com/

Webpage served by the running Magic-1 computer: http://magic-1.org/

Shell access to the running Magic-1 computer: telnet://magic-1.org:51515

Aidil Jazmi's hardware-level clone of Magic-1: http://www.oocities.org/homemadecpu/