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N.B: MISC-x86 is not based on MISC by Safalra / Stephen Morley.

MISC-x86 is the "Minimal x86 Instruction Subset Computer". Its instruction set is a subset of the 32-bit x86 instruction set, consisting of only 3 basic single-operand instructions (LOAD byte from address X, STORE byte at address X, relative JUMP with address offset X). X is 4 bytes wide. The corresponding x86-32 opcodes are A0, A2 and E9.

This minimal x86 instruction subset is actually able to compute anything a "real" 32-bit microprocessor can (although slower since it operates on the the level of individual bytes). By using LUTs in memory, combined with self-modifying code (which is allowed by x86) to manipulate individual bytes in the 4-byte address operands of the instructions, it is possible to simulate arithmetic, conditional jumps, indirect addressing etc; see the example in ByteByteJump. MISC-x86 can be thought of as the 3-operand ByteByteJump instruction, split up into 3 separate 1-operand x86 instructions. The main difference is that the MISC-x86 jump operand is a relative address offset, while ByteByteJump uses an absolute jump address.

Each of the 3 MISC-x86 instructions have the same basic 5-byte machine code form:


xx is the 1-byte opcode.
aabbccdd is a 4-byte (relative or absolute) address operand, stored in little-endian byte order (read "backwards").

Machine code   | Mnemonics (FASM)   | Description
A0,dd,cc,bb,aa | mov AL,[$aabbccdd] | Move 1 byte from memory location $aabbccdd to Acc.
A2,dd,cc,bb,aa | mov [$aabbccdd],AL | Move 1 byte from Acc to memory location $aabbccdd.
E9,dd,cc,bb,aa | jmp $aabbccdd      | Perform relative jump with address offset $aabbccdd.

See Also